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Sheet目录3862

196页 197页 198页 199页 [200页]201页 202页 203页 204页

2011 Microchip Technology Inc.

DS39932D-page 73

PIC18F46J11 FAMILY

BAUDCON1

PIC18F2XJ11

PIC18F4XJ11

0100 0-00

uuuu u-uu

SPBRGH2

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

BAUDCON2

PIC18F2XJ11

PIC18F4XJ11

0100 0-00

uuuu u-uu

TMR3H

PIC18F2XJ11

PIC18F4XJ11

xxxx xxxx

uuuu uuuu

TMR3L

PIC18F2XJ11

PIC18F4XJ11

xxxx xxxx

uuuu uuuu

T3CON

PIC18F2XJ11

PIC18F4XJ11

0000 -000

uuuu -uuu

TMR4

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

PR4

PIC18F2XJ11

PIC18F4XJ11

1111 1111

uuuu uuuu

T4CON

PIC18F2XJ11

PIC18F4XJ11

-000 0000

-uuu uuuu

SSP2BUF

PIC18F2XJ11

PIC18F4XJ11

xxxx xxxx

uuuu uuuu

SSP2ADD

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

SSP2MSK

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

SSP2STAT

PIC18F2XJ11

PIC18F4XJ11

1111 1111

uuuu uuuu

SSP2CON1

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

SSP2CON2

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

CMSTAT

PIC18F2XJ11

PIC18F4XJ11

---- --11

---- --uu

PMADDRH(5)

—

PIC18F4XJ11

-000 0000

-uuu uuuu

PMDOUT1H(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

PMADDRL(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

PMDOUT1L(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

PMDIN1H(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

PMDIN1L(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

TXADDRL

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

TXADDRH

PIC18F2XJ11

PIC18F4XJ11

---- 0000

---- uuuu

RXADDRL

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

RXADDRH

PIC18F2XJ11

PIC18F4XJ11

---- 0000

---- uuuu

DMABCL

PIC18F2XJ11

PIC18F4XJ11

0000 0000

uuuu uuuu

DMABCH

PIC18F2XJ11

PIC18F4XJ11

---- --00

---- --uu

PMCONH(5)

—

PIC18F4XJ11

0--0 0000

u--u uuuu

PMCONL(5)

—

PIC18F4XJ11

000- 0000

uuu- uuuu

PMMODEH(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

PMMODEL(5)

—

PIC18F4XJ11

0000 0000

uuuu uuuu

TABLE 5-2:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset,

Wake From

Deep Sleep

MCLR Resets

WDT Reset

RESET

Instruction

Stack Resets

CM Resets

Wake-up via WDT

or Interrupt

Legend: u

= unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Note 1:

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

See Table 5-1 for Reset value for specific condition.

Not implemented for PIC18F2XJ11 devices.

Not implemented on "LF" devices.

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